00001 /*
00002  * mmx.h
00003  * Copyright (C) 2000-2002 Michel Lespinasse <walken@zoy.org>
00004  * Copyright (C) 1999-2000 Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
00005  *
00006  * This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
00007  * See http://libmpeg2.sourceforge.net/ for updates.
00008  *
00009  * mpeg2dec is free software; you can redistribute it and/or modify
00010  * it under the terms of the GNU General Public License as published by
00011  * the Free Software Foundation; either version 2 of the License, or
00012  * (at your option) any later version.
00013  *
00014  * mpeg2dec is distributed in the hope that it will be useful,
00015  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00016  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00017  * GNU General Public License for more details.
00018  *
00019  * You should have received a copy of the GNU General Public License
00020  * along with this program; if not, write to the Free Software
00021  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00022  */
00023 
00024 /*
00025  * The type of an value that fits in an MMX register (note that long
00026  * long constant values MUST be suffixed by LL and unsigned long long
00027  * values by ULL, lest they be truncated by the compiler)
00028  */
00029 
00030 typedef union {
00031         long long               q;      /* Quadword (64-bit) value */
00032         unsigned long long      uq;     /* Unsigned Quadword */
00033         int                     d[2];   /* 2 Doubleword (32-bit) values */
00034         unsigned int            ud[2];  /* 2 Unsigned Doubleword */
00035         short                   w[4];   /* 4 Word (16-bit) values */
00036         unsigned short          uw[4];  /* 4 Unsigned Word */
00037         char                    b[8];   /* 8 Byte (8-bit) values */
00038         unsigned char           ub[8];  /* 8 Unsigned Byte */
00039         float                   s[2];   /* Single-precision (32-bit) value */
00040 } ATTR_ALIGN(8) mmx_t;  /* On an 8-byte (64-bit) boundary */
00041 
00042 
00043 #define mmx_i2r(op,imm,reg) \
00044         __asm__ __volatile__ (#op " %0, %%" #reg \
00045                               : /* nothing */ \
00046                               : "i" (imm) )
00047 
00048 #define mmx_m2r(op,mem,reg) \
00049         __asm__ __volatile__ (#op " %0, %%" #reg \
00050                               : /* nothing */ \
00051                               : "m" (mem))
00052 
00053 #define mmx_r2m(op,reg,mem) \
00054         __asm__ __volatile__ (#op " %%" #reg ", %0" \
00055                               : "=m" (mem) \
00056                               : /* nothing */ )
00057 
00058 #define mmx_r2r(op,regs,regd) \
00059         __asm__ __volatile__ (#op " %" #regs ", %" #regd)
00060 
00061 
00062 #define emms() __asm__ __volatile__ ("emms")
00063 
00064 #define movd_m2r(var,reg)       mmx_m2r (movd, var, reg)
00065 #define movd_r2m(reg,var)       mmx_r2m (movd, reg, var)
00066 #define movd_v2r(var,reg)       __asm__ __volatile__ ("movd %0, %%" #reg \
00067                                                       : /* nothing */ \
00068                                                       : "rm" (var))
00069 #define movd_r2v(reg,var)       __asm__ __volatile__ ("movd %%" #reg ", %0" \
00070                                                       : "=rm" (var) \
00071                                                       : /* nothing */ )
00072 
00073 #define movq_m2r(var,reg)       mmx_m2r (movq, var, reg)
00074 #define movq_r2m(reg,var)       mmx_r2m (movq, reg, var)
00075 #define movq_r2r(regs,regd)     mmx_r2r (movq, regs, regd)
00076 
00077 #define packssdw_m2r(var,reg)   mmx_m2r (packssdw, var, reg)
00078 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
00079 #define packsswb_m2r(var,reg)   mmx_m2r (packsswb, var, reg)
00080 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
00081 
00082 #define packuswb_m2r(var,reg)   mmx_m2r (packuswb, var, reg)
00083 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
00084 
00085 #define paddb_m2r(var,reg)      mmx_m2r (paddb, var, reg)
00086 #define paddb_r2r(regs,regd)    mmx_r2r (paddb, regs, regd)
00087 #define paddd_m2r(var,reg)      mmx_m2r (paddd, var, reg)
00088 #define paddd_r2r(regs,regd)    mmx_r2r (paddd, regs, regd)
00089 #define paddw_m2r(var,reg)      mmx_m2r (paddw, var, reg)
00090 #define paddw_r2r(regs,regd)    mmx_r2r (paddw, regs, regd)
00091 
00092 #define paddsb_m2r(var,reg)     mmx_m2r (paddsb, var, reg)
00093 #define paddsb_r2r(regs,regd)   mmx_r2r (paddsb, regs, regd)
00094 #define paddsw_m2r(var,reg)     mmx_m2r (paddsw, var, reg)
00095 #define paddsw_r2r(regs,regd)   mmx_r2r (paddsw, regs, regd)
00096 
00097 #define paddusb_m2r(var,reg)    mmx_m2r (paddusb, var, reg)
00098 #define paddusb_r2r(regs,regd)  mmx_r2r (paddusb, regs, regd)
00099 #define paddusw_m2r(var,reg)    mmx_m2r (paddusw, var, reg)
00100 #define paddusw_r2r(regs,regd)  mmx_r2r (paddusw, regs, regd)
00101 
00102 #define pand_m2r(var,reg)       mmx_m2r (pand, var, reg)
00103 #define pand_r2r(regs,regd)     mmx_r2r (pand, regs, regd)
00104 
00105 #define pandn_m2r(var,reg)      mmx_m2r (pandn, var, reg)
00106 #define pandn_r2r(regs,regd)    mmx_r2r (pandn, regs, regd)
00107 
00108 #define pcmpeqb_m2r(var,reg)    mmx_m2r (pcmpeqb, var, reg)
00109 #define pcmpeqb_r2r(regs,regd)  mmx_r2r (pcmpeqb, regs, regd)
00110 #define pcmpeqd_m2r(var,reg)    mmx_m2r (pcmpeqd, var, reg)
00111 #define pcmpeqd_r2r(regs,regd)  mmx_r2r (pcmpeqd, regs, regd)
00112 #define pcmpeqw_m2r(var,reg)    mmx_m2r (pcmpeqw, var, reg)
00113 #define pcmpeqw_r2r(regs,regd)  mmx_r2r (pcmpeqw, regs, regd)
00114 
00115 #define pcmpgtb_m2r(var,reg)    mmx_m2r (pcmpgtb, var, reg)
00116 #define pcmpgtb_r2r(regs,regd)  mmx_r2r (pcmpgtb, regs, regd)
00117 #define pcmpgtd_m2r(var,reg)    mmx_m2r (pcmpgtd, var, reg)
00118 #define pcmpgtd_r2r(regs,regd)  mmx_r2r (pcmpgtd, regs, regd)
00119 #define pcmpgtw_m2r(var,reg)    mmx_m2r (pcmpgtw, var, reg)
00120 #define pcmpgtw_r2r(regs,regd)  mmx_r2r (pcmpgtw, regs, regd)
00121 
00122 #define pmaddwd_m2r(var,reg)    mmx_m2r (pmaddwd, var, reg)
00123 #define pmaddwd_r2r(regs,regd)  mmx_r2r (pmaddwd, regs, regd)
00124 
00125 #define pmulhw_m2r(var,reg)     mmx_m2r (pmulhw, var, reg)
00126 #define pmulhw_r2r(regs,regd)   mmx_r2r (pmulhw, regs, regd)
00127 
00128 #define pmullw_m2r(var,reg)     mmx_m2r (pmullw, var, reg)
00129 #define pmullw_r2r(regs,regd)   mmx_r2r (pmullw, regs, regd)
00130 
00131 #define por_m2r(var,reg)        mmx_m2r (por, var, reg)
00132 #define por_r2r(regs,regd)      mmx_r2r (por, regs, regd)
00133 
00134 #define pslld_i2r(imm,reg)      mmx_i2r (pslld, imm, reg)
00135 #define pslld_m2r(var,reg)      mmx_m2r (pslld, var, reg)
00136 #define pslld_r2r(regs,regd)    mmx_r2r (pslld, regs, regd)
00137 #define psllq_i2r(imm,reg)      mmx_i2r (psllq, imm, reg)
00138 #define psllq_m2r(var,reg)      mmx_m2r (psllq, var, reg)
00139 #define psllq_r2r(regs,regd)    mmx_r2r (psllq, regs, regd)
00140 #define psllw_i2r(imm,reg)      mmx_i2r (psllw, imm, reg)
00141 #define psllw_m2r(var,reg)      mmx_m2r (psllw, var, reg)
00142 #define psllw_r2r(regs,regd)    mmx_r2r (psllw, regs, regd)
00143 
00144 #define psrad_i2r(imm,reg)      mmx_i2r (psrad, imm, reg)
00145 #define psrad_m2r(var,reg)      mmx_m2r (psrad, var, reg)
00146 #define psrad_r2r(regs,regd)    mmx_r2r (psrad, regs, regd)
00147 #define psraw_i2r(imm,reg)      mmx_i2r (psraw, imm, reg)
00148 #define psraw_m2r(var,reg)      mmx_m2r (psraw, var, reg)
00149 #define psraw_r2r(regs,regd)    mmx_r2r (psraw, regs, regd)
00150 
00151 #define psrld_i2r(imm,reg)      mmx_i2r (psrld, imm, reg)
00152 #define psrld_m2r(var,reg)      mmx_m2r (psrld, var, reg)
00153 #define psrld_r2r(regs,regd)    mmx_r2r (psrld, regs, regd)
00154 #define psrlq_i2r(imm,reg)      mmx_i2r (psrlq, imm, reg)
00155 #define psrlq_m2r(var,reg)      mmx_m2r (psrlq, var, reg)
00156 #define psrlq_r2r(regs,regd)    mmx_r2r (psrlq, regs, regd)
00157 #define psrlw_i2r(imm,reg)      mmx_i2r (psrlw, imm, reg)
00158 #define psrlw_m2r(var,reg)      mmx_m2r (psrlw, var, reg)
00159 #define psrlw_r2r(regs,regd)    mmx_r2r (psrlw, regs, regd)
00160 
00161 #define psubb_m2r(var,reg)      mmx_m2r (psubb, var, reg)
00162 #define psubb_r2r(regs,regd)    mmx_r2r (psubb, regs, regd)
00163 #define psubd_m2r(var,reg)      mmx_m2r (psubd, var, reg)
00164 #define psubd_r2r(regs,regd)    mmx_r2r (psubd, regs, regd)
00165 #define psubw_m2r(var,reg)      mmx_m2r (psubw, var, reg)
00166 #define psubw_r2r(regs,regd)    mmx_r2r (psubw, regs, regd)
00167 
00168 #define psubsb_m2r(var,reg)     mmx_m2r (psubsb, var, reg)
00169 #define psubsb_r2r(regs,regd)   mmx_r2r (psubsb, regs, regd)
00170 #define psubsw_m2r(var,reg)     mmx_m2r (psubsw, var, reg)
00171 #define psubsw_r2r(regs,regd)   mmx_r2r (psubsw, regs, regd)
00172 
00173 #define psubusb_m2r(var,reg)    mmx_m2r (psubusb, var, reg)
00174 #define psubusb_r2r(regs,regd)  mmx_r2r (psubusb, regs, regd)
00175 #define psubusw_m2r(var,reg)    mmx_m2r (psubusw, var, reg)
00176 #define psubusw_r2r(regs,regd)  mmx_r2r (psubusw, regs, regd)
00177 
00178 #define punpckhbw_m2r(var,reg)          mmx_m2r (punpckhbw, var, reg)
00179 #define punpckhbw_r2r(regs,regd)        mmx_r2r (punpckhbw, regs, regd)
00180 #define punpckhdq_m2r(var,reg)          mmx_m2r (punpckhdq, var, reg)
00181 #define punpckhdq_r2r(regs,regd)        mmx_r2r (punpckhdq, regs, regd)
00182 #define punpckhwd_m2r(var,reg)          mmx_m2r (punpckhwd, var, reg)
00183 #define punpckhwd_r2r(regs,regd)        mmx_r2r (punpckhwd, regs, regd)
00184 
00185 #define punpcklbw_m2r(var,reg)          mmx_m2r (punpcklbw, var, reg)
00186 #define punpcklbw_r2r(regs,regd)        mmx_r2r (punpcklbw, regs, regd)
00187 #define punpckldq_m2r(var,reg)          mmx_m2r (punpckldq, var, reg)
00188 #define punpckldq_r2r(regs,regd)        mmx_r2r (punpckldq, regs, regd)
00189 #define punpcklwd_m2r(var,reg)          mmx_m2r (punpcklwd, var, reg)
00190 #define punpcklwd_r2r(regs,regd)        mmx_r2r (punpcklwd, regs, regd)
00191 
00192 #define pxor_m2r(var,reg)       mmx_m2r (pxor, var, reg)
00193 #define pxor_r2r(regs,regd)     mmx_r2r (pxor, regs, regd)
00194 
00195 
00196 /* 3DNOW extensions */
00197 
00198 #define pavgusb_m2r(var,reg)    mmx_m2r (pavgusb, var, reg)
00199 #define pavgusb_r2r(regs,regd)  mmx_r2r (pavgusb, regs, regd)
00200 
00201 
00202 /* AMD MMX extensions - also available in intel SSE */
00203 
00204 
00205 #define mmx_m2ri(op,mem,reg,imm) \
00206         __asm__ __volatile__ (#op " %1, %0, %%" #reg \
00207                               : /* nothing */ \
00208                               : "m" (mem), "i" (imm))
00209 
00210 #define mmx_r2ri(op,regs,regd,imm) \
00211         __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \
00212                               : /* nothing */ \
00213                               : "i" (imm) )
00214 
00215 #define mmx_fetch(mem,hint) \
00216         __asm__ __volatile__ ("prefetch" #hint " %0" \
00217                               : /* nothing */ \
00218                               : "m" (mem))
00219 
00220 
00221 #define maskmovq(regs,maskreg)          mmx_r2ri (maskmovq, regs, maskreg)
00222 
00223 #define movntq_r2m(mmreg,var)           mmx_r2m (movntq, mmreg, var)
00224 
00225 #define pavgb_m2r(var,reg)              mmx_m2r (pavgb, var, reg)
00226 #define pavgb_r2r(regs,regd)            mmx_r2r (pavgb, regs, regd)
00227 #define pavgw_m2r(var,reg)              mmx_m2r (pavgw, var, reg)
00228 #define pavgw_r2r(regs,regd)            mmx_r2r (pavgw, regs, regd)
00229 
00230 #define pextrw_r2r(mmreg,reg,imm)       mmx_r2ri (pextrw, mmreg, reg, imm)
00231 
00232 #define pinsrw_r2r(reg,mmreg,imm)       mmx_r2ri (pinsrw, reg, mmreg, imm)
00233 
00234 #define pmaxsw_m2r(var,reg)             mmx_m2r (pmaxsw, var, reg)
00235 #define pmaxsw_r2r(regs,regd)           mmx_r2r (pmaxsw, regs, regd)
00236 
00237 #define pmaxub_m2r(var,reg)             mmx_m2r (pmaxub, var, reg)
00238 #define pmaxub_r2r(regs,regd)           mmx_r2r (pmaxub, regs, regd)
00239 
00240 #define pminsw_m2r(var,reg)             mmx_m2r (pminsw, var, reg)
00241 #define pminsw_r2r(regs,regd)           mmx_r2r (pminsw, regs, regd)
00242 
00243 #define pminub_m2r(var,reg)             mmx_m2r (pminub, var, reg)
00244 #define pminub_r2r(regs,regd)           mmx_r2r (pminub, regs, regd)
00245 
00246 #define pmovmskb(mmreg,reg) \
00247         __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg)
00248 
00249 #define pmulhuw_m2r(var,reg)            mmx_m2r (pmulhuw, var, reg)
00250 #define pmulhuw_r2r(regs,regd)          mmx_r2r (pmulhuw, regs, regd)
00251 
00252 #define prefetcht0(mem)                 mmx_fetch (mem, t0)
00253 #define prefetcht1(mem)                 mmx_fetch (mem, t1)
00254 #define prefetcht2(mem)                 mmx_fetch (mem, t2)
00255 #define prefetchnta(mem)                mmx_fetch (mem, nta)
00256 
00257 #define psadbw_m2r(var,reg)             mmx_m2r (psadbw, var, reg)
00258 #define psadbw_r2r(regs,regd)           mmx_r2r (psadbw, regs, regd)
00259 
00260 #define pshufw_m2r(var,reg,imm)         mmx_m2ri(pshufw, var, reg, imm)
00261 #define pshufw_r2r(regs,regd,imm)       mmx_r2ri(pshufw, regs, regd, imm)
00262 
00263 #define sfence() __asm__ __volatile__ ("sfence\n\t")